JFET THRESHOLD VOLTAGE ADJUSTING CIRCUIT.

被引：0
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作者：
Atwood, B.C.
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来源：
IBM technical disclosure bulletin | 1983年 / 25卷 / 11 A期
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摘要：
A circuit is provided for controlling the gate threshold voltage of a junction field-effect transistor (JFET) which has an NPN and PNP transistor feedback to the bottom gate of the JFET.
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页码：5677 / 5678
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