SILICON COMPILATION.

Silicon compilation is now a major branch of CAE research. It has generated a number of commercial products and is being progressed in many academic research projects. As improvements in silicon technology have permitted ever-larger circuits to be placed on a single die, the engineering effort involved has become a major limiting factor. Silicon compilation has become the most important technique for improving designer reproductivity. By using high-level input the number of gates designed per day is increased and engineering knowledge an involvement at the silicon level are minimized. The designer has access to silicon in terms of his own expertise (consumer electronics, telecommuincations etc. ) rather than the alien language of the layout engineer. With the aid of rapid prototyping, which is now available, many designs can be compiled and fabricated with less engineering effort than an equivalent printed circuit board solution.