New dynamic ternary sense amplifier for 1.5-bit/cell multi-level low-voltage CMOS drams

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作者
Wu, Chung-Yu [1 ]
Yu-Yee, Liow [1 ]
机构
[1] Natl Chiao Tung Univ, Hsing Chu, Taiwan
关键词
Amplifiers (electronic) - CMOS integrated circuits - Computer simulation - Integrated circuit manufacture - MOSFET devices - Performance - Threshold voltage;
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摘要
A novel 1.5-bit (3-level)/cell storage technique is described. This sense amplifier of DRAM can sense the ternary state. Thus, this structure can effectively reduce the bit-cost. The proposed DRAM can be operated at 1.5V without changing the common DRAM process.
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