The three dimensional shapes and sizes of the embedded Si nanostructures in Si single-electron transistors (SETs) are observed by using microscopic methods, scanning electron microscopy (SEM), atomic force microscopy (AFM), and transmission electron microscopy (TEM). The width of the Si wire in the SET whose conductance oscillations are observed at 25 K is in the range of 7-15 nm measured by SEM. The height of the wire is estimated to be 5-10 nm by AFM. The size of Si wire is small enough to produce the potential barrier caused by the quantum mechanical effect. The effective length of the single-electron island is determined from the relationship between the gate capacitance and the length of the Si wire. The effective length is 23 nm shorter than the Si wire length. The distortion in the Si wire in SET is evaluated from the high-resolution image of TEM. The length of the distorted region is almost the same as the effective length of the single-electron island. The distortion will produce the potential well in the Si wire. Microscopic observations suggested the existence of potential barriers caused by the quantum mechanical effect and that of the potential well originated from the distortion in the Si wire of SET devices, which agrees with the theoretical model of Si SETs fabricated using pattern-dependent oxidation.