Survey on built-in self-test and built-in self-repair of embedded memories
被引:0
作者:
Jiang, Jian-Hui
论文数: 0引用数: 0
h-index: 0
机构:
Dept. of Comp. Sci. and Technol., Tongji Univ., Shanghai 200092, ChinaDept. of Comp. Sci. and Technol., Tongji Univ., Shanghai 200092, China
Jiang, Jian-Hui
[1
]
Zhu, Wei-Guo
论文数: 0引用数: 0
h-index: 0
机构:
Dept. of Comp. Sci. and Technol., Tongji Univ., Shanghai 200092, ChinaDept. of Comp. Sci. and Technol., Tongji Univ., Shanghai 200092, China
Zhu, Wei-Guo
[1
]
机构:
[1] Dept. of Comp. Sci. and Technol., Tongji Univ., Shanghai 200092, China
来源:
Tongji Daxue Xuebao/Journal of Tongji University
|
2004年
/
32卷
/
08期
关键词:
Built-in self test - Fault tree analysis - Integrated circuit testing - Mathematical models;
D O I:
暂无
中图分类号:
学科分类号:
摘要:
Built-in self-test (BIST) is considered as an efficient approach for embedded memories testing. This paper gives a survey on the up-to-date development of research in this field. It begins with an overview of conventional fault models for memories so far. The inductive fault analysis approach and some new fault models such as read disturb fault and incorrect read fault are discussed. The typical BIST schemes for embedded memories are analyzed. The feasibility of adding built-in redundancy analysis, built-in self-diagnosis and built-in self-repair into BIST circuits is analyzed.