CMOS CIRCUIT TESTABILITY.

被引：0

作者：

Moritz, P.S. ^{[1
]}

Thorsen, L.M. ^{[1
]}

机构：

[1] IBM, Essex Junction, VT, USA, IBM, Essex Junction, VT, USA

来源：

IEEE Journal of Solid-State Circuits | 1986年 / SC-21卷 / 02期

关键词：

SEMICONDUCTOR DEVICES; MOS; -; Applications;

D O I：

10.1109/jssc.1986.1052520

中图分类号：

学科分类号：

摘要：

CMOS circuits present unique testing problems. Although open faults in CMOS circuits can be statistically tested, a sequence of patterns is required to guarantee a test. In addition, connections the circuit layout affect testability. An automatic test generator has been developed to generate test sequences which will detect open CMOS faults.

引用

页码：306 / 309