Robust ultra-low power sub-threshold DTMOS logic

被引：0
|
作者：
Soeleman, Hendrawan [1 ]
Roy, Kaushik [1 ]
Paul, Bipul [1 ]
机构：
[1] Purdue Univ, West Lafayette, IN, United States
来源：
Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers | 2000年
关键词：
Compendex;
D O I：
10.1145/344166.344187
中图分类号：
学科分类号：
摘要：
Energy utilization - Integrated circuit layout - Leakage currents - Logic circuits - MOS devices - Transistors
引用
收藏
页码：25 / 30
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