共 50 条
- [23] A study of normal, restoring, and fillet forces and solder bump geometry during reflow in concurrent underfill/reflow flip chip assembly 51ST ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2001, : 699 - 703
- [24] Development of warpage measurement system to simulate convective solder reflow process IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 2008, 31 (01): : 83 - 90
- [26] Characterization of a No-Flow underfill encapsulant during the solder reflow process 48TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1998 PROCEEDINGS, 1998, : 1253 - 1259
- [27] A Novel Approach to Optimizing Solder Reflow Process in Assembling PQFN Packages IPACK 2009: PROCEEDINGS OF THE ASME INTERPACK CONFERENCE 2009, VOL 1, 2010, : 329 - 334
- [28] Investigation of the Assembly Reflow Process and PCB Design on the Reliability of WLCSP 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 959 - 964
- [29] Assembly process issues in integrating commercial reflow encapsulants into flip chip assembly ADVANCES IN ELECTRONIC MATERIALS AND PACKAGING 2001, 2001, : 150 - 154
- [30] Materials to integrate the solder reflow and underfill encapsulation processes for flip chip on board assembly IEEE transactions on components, packaging and manufacturing technology. Part C. Manufacturing, 1998, 21 (01): : 57 - 65