Method for automatic design error location and correction in combinational logic circuits

被引：0
|
作者：
TIMA Lab, Grenoble, France [1 ]
机构：
来源：
J Electron Test Theory Appl JETTA | / 2卷 / 113-127期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [1] A method for automatic design error location and correction in combinational logic circuits
    Wahba, AM
    Borrione, D
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 1996, 8 (02): : 113 - 127
  • [2] Connection error location and correction in combinational circuits
    Wahba, AM
    Borrione, D
    EUROPEAN DESIGN & TEST CONFERENCE - ED&TC 97, PROCEEDINGS, 1997, : 235 - 241
  • [3] Combinational logic soft error correction
    Mitra, Subhasish
    Zhang, Ming
    Waqas, Saad
    Seifert, Norbert
    Gill, Balkaran
    Kim, Kee Sup
    2006 IEEE INTERNATIONAL TEST CONFERENCE, VOLS 1 AND 2, 2006, : 824 - +
  • [4] Design of combinational logic digital circuits using a mixed logic synthesis method
    Balasubramanian, P
    Narayana, MRL
    Chinnadurai, R
    IEEE: 2005 INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES, PROCEEDINGS, 2005, : 289 - 294
  • [5] Approaches of error diagnosis and correction in combinational circuits
    Li, Z
    Yan, XL
    Ge, HT
    2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2003, : 1171 - 1174
  • [6] Soft error generation analysis in combinational logic circuits
    Ding Qian
    Wang Yu
    Luo Rong
    Wang Hui
    Yang Huazhong
    JOURNAL OF SEMICONDUCTORS, 2010, 31 (09)
  • [7] Simulation-based design error diagnosis and correction in combinational digital circuits
    Nayak, D
    Walker, DMH
    17TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1999, : 70 - 78
  • [8] Simulation-based design error diagnosis and correction in combinational digital circuits
    Nayak, Debashis
    Walker, D.M.H.
    Proceedings of the IEEE VLSI Test Symposium, 1999, : 70 - 78
  • [9] Soft error tolerant design of combinational circuits based on a local logic substitution scheme
    Rohanipoor, Mohammad Reza
    Ghavami, Behnam
    Raji, Mohsen
    MICROELECTRONICS JOURNAL, 2017, 67 : 143 - 154
  • [10] Evolutionary multiobjective design of combinational logic circuits
    Coello, CAC
    Aguirre, AH
    Buckles, BP
    SECOND NASA/DOD WORKSHOP ON EVOLVABLE HARDWARE, PROCEEDINGS, 2000, : 161 - 170
12345