COMPUTER ARCHITECTURE FOR DIGITAL LOGIC SIMULATION.

被引：0

作者：

Barto, R.

Szygenda, S.A.

机构：

来源：

Electronic Engineering (London) | 1980年 / 52卷 / 642期

关键词：

Compendex;

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摘要：

LOGIC CIRCUITS

引用

页码：35 / 66

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[1] TABLE LOOKUP TECHNIQUES FOR FAST AND FLEXIBLE DIGITAL LOGIC SIMULATION.
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[2] FUNCTIONAL MODELLING FOR LOGIC SIMULATION.
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[4] MULTI-PROCESSOR ARCHITECTURE FOR SIMULATION.
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[5] CONVERGENCE OF THE CONSTANT INTERVAL DIGITAL SIMULATION.
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[9] STUDY OF THE EFFECTS OF NEW TRANSPORTATION SYSTEMS ON URBAN TRANSPORTATION AND ENVIRONMENT BY COMPUTER SIMULATION.
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[10] APPLICABILITY OF HYBRID SIMULATION.
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