Physically based modelling of the double-gate SOI transistor with thin semiconductor film

被引:0
|
作者
Majkusiak, B. [1 ]
Janik, T. [1 ]
机构
[1] Warsaw Univ of Technology, Warszawa, Poland
来源
Electron Technology (Warsaw) | 1999年 / 32卷 / 01期
关键词
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:29 / 38
相关论文
共 50 条
  • [21] ELECTRONIC CHARACTERIZATION OF DOUBLE-GATE THIN-FILM TRANSISTORS
    CHEN, I
    LUO, FC
    SOLID-STATE ELECTRONICS, 1981, 24 (03) : 257 - 261
  • [22] Independent gate skewed logic in double-gate SOI technology
    Cakici, T
    Mahmoodi, H
    Mukhopadhyay, S
    Roy, K
    2005 IEEE INTERNATIONAL SOI CONFERENCE, PROCEEDINGS, 2005, : 83 - 84
  • [23] Double-Gate Two-Step Source/Drain Poly-Si Thin-Film Transistor
    Chien, Feng-Tso
    Hung, Chih-Ping
    Chiu, Hsien-Chin
    Kang, Tsung-Kuei
    Cheng, Ching-Hwa
    Tsai, Yao-Tsung
    COATINGS, 2019, 9 (04):
  • [24] Double-Gate Junctionless Transistor for Analog Applications
    Baruah, Ratul Kumar
    Paily, Roy
    JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, 2013, 13 (03) : 1802 - 1807
  • [25] Manufacturability of single and double-gate ultrathin silicon film fully depleted SOI technologies
    Krivokapic, Z
    Heavlin, WD
    IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2002, 15 (02) : 144 - 150
  • [26] Modelling and Comparison of Single Gate and Dual Gate Organic Thin Film Transistor
    Saini, Deepa
    Saini, Shilpa
    Negi, Shubham
    2016 INTERNATIONAL CONFERENCE ON EMERGING TRENDS IN COMMUNICATION TECHNOLOGIES (ETCT), 2016,
  • [27] Mathematical modelling for Double-Gate MOSFETS
    Mahmood, S. A.
    Huda, M. Q.
    ICECE 2006: PROCEEDINGS OF THE 4TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, 2006, : 526 - +
  • [28] Electron transport in ultrathin double-gate SOI devices
    Gámiz, F
    Roldán, JB
    López-Villanueva, JA
    Jiménez-Molinos, F
    Carceller, JE
    MICROELECTRONIC ENGINEERING, 2001, 59 (1-4) : 423 - 427
  • [29] MODELING OF ULTRATHIN DOUBLE-GATE NMOS/SOI TRANSISTORS
    FRANCIS, P
    TERAO, A
    FLANDRE, D
    VANDEWIELE, F
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (05) : 715 - 720
  • [30] Impact of gate coupling and misalignment on performance of double-gate organic thin film transistors
    Han, Jingwen
    Sun, Lei
    Xu, Hao
    Zhang, Yibo
    Zhang, Shengdong
    Wang, Yi
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2015, 54 (04)