Hashing ATD Tags for Low-Overhead Safe Contention Monitoring

被引:0
|
作者
Andreu, Pablo [1 ]
Lopez, Pedro [1 ]
Hernandez, Carles [1 ]
机构
[1] Univ Politecn Valencia, Valencia 46022, Spain
关键词
Multicore processing; Monitoring; Hardware; Timing; Task analysis; Certification; Safety; contention; caches; ATD; multicore;
D O I
10.1109/LCA.2024.3401570
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Increasing the performance of safety-critical systems via introducing multicore processors is becoming the norm. However, when multiple cores access a shared cache, inter-core evictions become a relevant source of interference that must be appropriately controlled. To solve this issue, one can statically partition caches and remove the interference. Unfortunately, this comes at the expense of less flexibility and, in some cases, worse performance. In this context, enabling more flexible cache allocation policies requires additional monitoring support. This paper proposes HashTAG, a novel approach to accurately upper-bound inter-core eviction interference. HashTAG enables a low-overhead implementation of an Auxiliary Tag Directory to determine inter-core evictions. Our results show that no inter-task interference underprediction is possible with HashTAG while providing a 44% reduction in ATD area with only 1.14% median overprediction.
引用
收藏
页码:166 / 169
页数:4
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