The future of semiconductor manufacturing

被引:0
作者
Intel Corporation, 5000 W. Chandler Boulevard, Chandler, AZ 85226, United States [1 ]
机构
[1] Intel Corporation, Chandler, AZ 85226
来源
IEEE Rob Autom Mag | 2006年 / 4卷 / 16-24期
关键词
AMHS; Carrier architecture; Cybersecurity; Data architecture; Factory automation; Factory integration; High-mix production systems; Material handling systems; Reticle handling; Setups; Ssmall-lot; Systems integration; Wafer fabrication;
D O I
10.1109/MRA.2006.250560
中图分类号
学科分类号
摘要
This paper addresses the evolving requirements for factory integration and automation solutions that are being targeted to address the scale and complexity of the factories of the future. These requirements drive the need for real breakthrough solutions. More than ever before, there must be a strong focus on developing integrated solutions, using mainstream computer communications standards and protocols, so that development and implementation time is minimized and the software solutions are extendible as information technology evolves over time. The volume of manufacturing, process, yield, inspection, quality, and other critical data continues to exponentially increase with each new technology; therefore, its collection, storage, access, sharing, analysis, and retention methods have become a major challenge as well as a strategic competitive advantage for each company. Developing a flexible information systems architecture, with security features taking center stage to thwart possible virus infections, has also become an absolute necessity. Reduction of factory cycle times has become an important priority, as increased inventory (due to larger wafers) of the wrong" products in an everchanging marketplace results in a high risk of product obsolescence and loss of revenue. Other equally important business drivers facing the new generation of fabs also will be covered in this article. © 2006 IEEE."
引用
收藏
页码:16 / 24
页数:8
相关论文
共 9 条
  • [1] International technology roadmap for semiconductors (ITRS), (2005)
  • [2] Honma M., Kobayashi S., Next generation 300 mm factory, SEMI Sponsored Manufacturing Technology Forum (MTF), (2006)
  • [3] Liu M., High mix manufacturing requirements, International Sematech Manufacturing Initiative (IMSI), (2005)
  • [4] Pettinato J., Pillai D., Technology decisions to minimize 450-mm wafer size transition risk, IEEE Trans. Semiconduct. Manufact., 18, 4, pp. 501-509, (2005)
  • [5] Subramaniam B., Golla C., Pillai D., Lockwood C., 300 mm equipment buffering strategy to maximize fab productivity, Proc. IEEE Int. Symp. Semiconductor Manufacturing Conf. (ISSM) Technical Poster Session, pp. 329-332, (2003)
  • [6] Pillai D., Edward B., Dempsey J., Yellig E., 300 mm full factory dynamic simulations for 90 nm and 65 nm IC manufacturing, IEEE Trans. Semicond. Manufact., 17, 3, pp. 292-298, (2004)
  • [7] Sohn B., Pillai D., Acker N., 300 mm factory design for operational effectiveness, (2000)
  • [8] Silverman P., Moore's law semiconductor economics and wafer size, ConFab 2006, (2006)
  • [9] Hutcheson D., Chip insider - Trecenti technologies, (2003)