ASIC implementation of high speed processor for calculating discrete fourier transformation using circular convolution technique

被引：0

作者：

Saha, P. ^{[1
]}

Banerjee, A. ^{[2
]}

Dandapat, A. ^{[3
]}

Bhattacharyya, P. ^{[4
]}

机构：

[1] School of VLSI Technology, Bengal Engineering and Science University, Shibpur, Howrah-711103,WB, India

[2] Department of Electronics and Communication Engineering, JIS College of Engineering, Kalyani-741235, WB, India

[3] Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata-700032, WB, India

[4] Department of Electronics and Telecommunication Engineering, Bengal Engineering and Science University, Shibpur, Howrah-711103, WB, India

来源：

WSEAS Transactions on Circuits and Systems | 2011年 / 10卷 / 08期

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摘要：

引用

页码：278 / 288

共 39 条

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