共 47 条
[2]
Azzaz M, 2015, PROC EUR S-STATE DEV, P266, DOI 10.1109/ESSDERC.2015.7324765
[3]
Accurate Inference with Inaccurate RRAM Devices: Statistical Data, Model Transfer, and On-line Adaptation
[J].
PROCEEDINGS OF THE 2020 57TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC),
2020,
[4]
Chen GG, 2014, INT CONF ACOUST SPEE
[5]
PRIME: A Novel Processing-in-memory Architecture for Neural Network Computation in ReRAM-based Main Memory
[J].
2016 ACM/IEEE 43RD ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA),
2016,
:27-39
[7]
CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm
[J].
MICRO'52: THE 52ND ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE,
2019,
:114-125
[8]
Fantini A, 2013, 2013 5TH IEEE INTERNATIONAL MEMORY WORKSHOP (IMW), P30, DOI 10.1109/IMW.2013.6582090
[9]
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
[J].
2021 IEEE 12TH LATIN AMERICA SYMPOSIUM ON CIRCUITS AND SYSTEM (LASCAS),
2021,
[10]
Garcia A, 2017, APPR DIGIT GAME STUD, V5, P1