Exploiting switching properties of non-volatile memory chips for data security applications

被引：0
作者：
Chakraborty, Supriya [1 ]
Suri, Manan [1 ]
机构：
[1] Department of Electrical Engineering, Indian Institute of Technology Delhi, Hauz Khas, New Delhi
来源：
Memories - Materials, Devices, Circuits and Systems | 2023年 / 4卷
关键词：
Cryptography; Flash; Hardware security; Non-volatile memory; One-time padding; RRAM; TRNG;
D O I：
10.1016/j.memori.2023.100044
中图分类号：
学科分类号：
摘要：
This paper presents a technique of utilizing Commercial-Off-The-Self (COTS) Non-Volatile Memory (NVM) chips for data security applications. In particular, True Random Numbers (TRNs) are generated by harnessing the latency variability observed in NVM chips. Subsequent series of mathematical operations are implemented as post-processing techniques to increase the randomness of the TRNs. The generated TRNs are then utilized as a source of random keys for One-Time Pad (OTP) cryptosystem. The proposed methodology of TRNs extraction is experimentally validated on three different types of NVM technologies. TRNG throughput in a range of 0.09 Kb/s to 0.67 Kb/s is observed for the investigated technologies. Generated TRNs pass all the tests of NIST SP 800-22 statistical test suite with significant P–values. Metrics like MSE, CC, SSIM, NPCR, UACI, PSNR, and key space are also analyzed for the OTP cryptosystem. © 2023 The Author(s)
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