Vlsi architecture for low power minimum signed digit multiplier for fir filter and its signal processing applications

被引：0

作者：

Vijeyakumar, K.N. ^{[1
]}

Sumathy, V. ^{[2
]}

Aishwarya, E.J. ^{[3
]}

Saravanakumar, S. ^{[4
]}

Devi, M. Gayathri ^{[4
]}

机构：

[1] Department of ECE, Anna university of Technology, Coimbatore, India

[2] Department of ECE, Government College of Technology, Coimbatore, India

[3] Department of ECE, Sri Shakthi Institute of Engineering and Technology, Coimbatore, India

[4] Department of ECE, Anna university of Technology, Coimbatore, India

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摘要：

FIR filters

引用

页码：50 / 58