Accelerating Maximum-Likelihood Detection in Massive MIMO: A New Paradigm With Memristor Crossbar Based In-Memory Computing Circuit

被引:0
作者
Ren, Yi-Hang [1 ,2 ,3 ]
Yang, Shaoshi [1 ,2 ,3 ]
Bi, Jia-Hui [1 ,2 ,3 ]
Zhang, Yu-Xin [1 ,2 ,3 ]
机构
[1] Beijing Univ Posts & Telecommun, Sch Informat & Commun Engn, Beijing 100876, Peoples R China
[2] Minist Educ, Key Lab Universal Wireless Commun, Beijing 100876, Peoples R China
[3] Minist Educ, Key Lab Math & Informat Networks, Beijing 100876, Peoples R China
关键词
Memristors; Vectors; Detectors; Circuit synthesis; Resistance; Massive MIMO; Integrated circuit modeling; Laboratories; maximum-likelihood detection; memristor crossbar; in-memory computing;
D O I
10.1109/TVT.2024.3447714
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Massive multi-input multi-output (MIMO) signal processing algorithms heavily rely on high-dimension matrix operations, which impose excessively high computational complexity. Moreover, in the post-Moore era, the performance of the classical von Neumann computing architecture is facing severe limitations. The memristor crossbar based in-memory computing holds the potential to break the memory wall and enhance the circuit's energy efficiency by orders-of-magnitude. In this paper we present a memristor crossbar based circuit design for performing the optimal maximum likelihood (ML) MIMO detection with high computation parallelism at the base station equipped with a large-scale antenna array. Simulation results show that, despite considering the circuit programming error and the memristor bit-precision, the bit error rate (BER) of the proposed circuit is almost the same as that achieved by the digital computer. Moreover, the proposed circuit achieves roughly the same level of computing performance as the NVIDIA QUADRO GV100, but with about 40 times higher energy efficiency.
引用
收藏
页码:19745 / 19750
页数:6
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