Design and implementation of LC voltage controlled oscillator with low phase noise

被引:0
|
作者
Chang, Changyuan [1 ]
Wang, Shaoquan [1 ]
Chen, Yao [1 ]
Yu, Dongsheng [1 ]
机构
[1] School of Integrated Circuit, Southeast University
来源
Dongnan Daxue Xuebao (Ziran Kexue Ban)/Journal of Southeast University (Natural Science Edition) | 2012年 / 42卷 / 06期
关键词
CMOS(complementary metal oxide semiconductor); LC voltage controlled oscillator; Phase noise; Switch capacitance array;
D O I
10.3969/j.issn.1001-0505.2012.06.006
中图分类号
学科分类号
摘要
Based on TSMC 0.35 μm CMOS process, a fully integrated LC voltage controlled oscillator (VCO) used in phase lock loop (PLL) frequency synthesizer with low phase noise is designed and implemented. The LC VCO has a complementation cross-couple differential structure and adopts switched-capacitor technique to increase frequency tune range. Large filtering capacitance, second harmonic filtering network, switched-capacitor array and bias filter network are used to reduce phase noise. Simulation, layout design and post-simulation are completed by TSMC 0.35 μm CMOS process. The chip size is 1 285.3 μm×1 162.7 μm. Chip testing results show that the frequency of the LC VCO can be tuned from 1.558 to 2.065 GHz. The tune range is 28%. In the center oscillation frequency, the phase noise of the LC VCO can achieve -133.3 dBc/Hz at 1 MHz, and the FOM(figure of merit) is -183.3 dBc/Hz. Thus, the overall performance of the designed VCO is good.
引用
收藏
页码:1052 / 1057
页数:5
相关论文
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