Design and validation of a new high speed clock and data recovery circuit

被引：0
|
作者：
Ye, Guojing [1 ]
Sun, Man [1 ]
Guo, Gan [1 ]
Hong, Zhiliang [1 ]
机构：
[1] ASIC and System State Key Laboratory, Fudan University, Shanghai 200433, China
来源：
Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics | 2007年 / 27卷 / 04期
关键词：
CMOS integrated circuits;
D O I：
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中图分类号：
学科分类号：
摘要：
引用
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页码：529 / 534
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