Tin whisker risk assessment

被引:15
作者
CALCE Electronic Products and Systems Center, University of Maryland, College Park, MD, United States [1 ]
不详 [2 ]
机构
[1] CALCE Electronic Products and Systems Center, University of Maryland, College Park, MD
关键词
Algorithmic languages; Printed circuits; Risk assessment; Tin-lead;
D O I
10.1108/03056120610663371
中图分类号
学科分类号
摘要
Purpose - To present a methodology, including the algorithms, to quantify the risk of failure from tin whiskers and to present a dynamic risk trend based on the distribution of each of the whisker growth parameters, generated from experiments over a period of time. This paper also aims to demonstrate the practical application of the methodology developed. Design/methodology/approach - This paper has been written to provide a methodology to assess tin whisker risk due to fixed whiskers in electronic products. The risk assessment process has been detailed in the paper. To demonstrate the usefulness of the methodology, a tin whisker risk assessment was conducted for a printed circuit board (PCB) in operation. Findings - Based on the experimental tin whisker growth d ata it is observed that growth rates of mean length and average density decrease with time. Based on the risk assessment, it was estimated that for the common matte tin over copper finish, the failure risk for the circuit card assembly was 4 per cent over 20 years. It was recommended that, for this product, components with bright tin lead finish should not be used. It was also found that the effectiveness of the conformal coating on this PCB is limited by the relative risk of the components on the board. Originality/value - The paper provides a new methodology to assess fixed tin whisker risk in electronic products. The methodology provides a dynamic risk trend with time because the algorithm incorporates distributional data of whisker growth and the distributional data as a function of time. This type of assessment was lacking in the previous studies.
引用
收藏
页码:25 / 29
页数:4
相关论文
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