Effect analysis and eliminating scheme for DC components to sinusoidal amplitude integrators based synchronization signal detection method

被引：0

作者：

Du, Xiong ^{[1
]}

Wang, Guoning ^{[1
]}

Sun, Pengju ^{[1
]}

Zhou, Luowei ^{[1
]}

机构：

[1] State Key Laboratory of Power Transmission Equipment and System Security and New Technology, Chongqing University, Shapingba District, Chongqing

来源：

Zhongguo Dianji Gongcheng Xuebao/Proceedings of the Chinese Society of Electrical Engineering | 2014年 / 34卷 / 24期

基金：

中国国家自然科学基金;

关键词：

Direct current (DC) components; Frequency locked-loop; Sinusoidal amplitude integrator (SAI); Synchronization signal;

D O I：

10.13334/j.0258-8013.pcsee.2014.24.012

中图分类号：

学科分类号：

摘要：

The control of three-phase grid-tied converters needs the accuracy detection of the grid synchronization signal. The frequency-locked loop based on sinusoidal amplitude integrators (SAI-FLL) is a synchronization signal detection method with simple structure and good performance. Firstly, the paper analyzed the performance of SAI-FLL when the input signals contain (direct current) DC components. The results show that the input DC components generate a fundamental frequency ripple in positive sequence magnitude and frequency signal, and additional DC components in negative sequence magnitude. To eliminate DC components effect, this paper proposed a method which employs the frequency selective feature of sinusoidal amplitude integrator (SAI), regarding DC components as AC components of zero frequency, forming a unified SAI approach with simple control structures. The theoretical, simulation and experimental results indicate that the method can eliminate the DC components and has the property of separating the positive-sequence and negative-sequence components for grid voltage containing DC components under unbalance grid voltage and frequency variation condition. © 2014 Chin. Soc. for Elec. Eng.

引用

页码：4084 / 4091

页数：7