Embedded system modeling and verification based on deterministic and stochastic Petri net

Embedded systems are interrupt-driven systems, which achieve interactions with peripherals and environment through the interrupt mechanism, and handle exceptions. However, due to the randomness of trigger method, response with priority, and preemptive execution, interrupt behaviors are hard to accurately predict and interrupt defects are difficult to track. Once a program error is caused by interrupt, it will lead to crashes of the entire embedded system. In this paper, a modeling method of embedded system is proposed based on deterministic and stochastic Petri net (DSPN), which can simulate interrupt processing through three types transitions of DSPN. The upper limit processing time calculation methods of interrupt service are provided for the determinate timed transition. In addition, a model verification method based on the continuous stochastic logic (CSL) for DSPN model is given to analyze the influences of interrupt nesting for embedded system performance, and functional verification and performance evaluation of interrupt-driven embedded systems in one model are also implemented. 1553-9105/Copyright © 2014 Binary Information Press.