2D threshold-voltage model for high-k gate-dielectric MOSFETs

被引：0
|
作者：
Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China [1 ]
不详 [2 ]
机构：
来源：
Pan Tao Ti Hsueh Pao | 2006年 / 10卷 / 1725-1731期
关键词：
14;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [1] A Compact Threshold-Voltage Model of MOSFETs with Stack High-k Gate Dielectric
    Ji, F.
    Xu, J. P.
    Chen, J. J.
    Xu, H. X.
    Li, C. X.
    Lai, P. T.
    2009 IEEE INTERNATIONAL CONFERENCE OF ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC 2009), 2009, : 236 - +
  • [2] A threshold voltage model for high-k gate-dielectric MOSFETs considering fringing-field effect
    Ji Feng
    Xu Jing-Ping
    Lai Pui-To
    CHINESE PHYSICS, 2007, 16 (06): : 1757 - 1763
  • [3] A threshold voltage model for high-k gate-dielectric MOSFETs considering fringing-field effect
    Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
    不详
    Chin. Phys., 2007, 6 (1757-1763):
  • [4] A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric
    Ji, Feng
    Xu, J. P.
    Liu, L.
    Tang, W. M.
    Lai, P. T.
    MICROELECTRONICS RELIABILITY, 2016, 57 : 24 - 33
  • [5] A 2D analytical model for SCEs in MOSFETs with high-k gate dielectric
    Xie, Qian
    Xu, Jun
    Ren, Tianling
    Taur, Yuan
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2010, 25 (03)
  • [6] Threshold voltage model for MOSFETs with high-K gate dielectrics
    Liu, XY
    Kang, JF
    Sun, L
    Han, RQ
    Wang, YY
    IEEE ELECTRON DEVICE LETTERS, 2002, 23 (05) : 270 - 272
  • [7] A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric
    Liu Chaowen
    Xu Jingping
    Liu Lu
    Lu Hanhan
    Huang Yuan
    JOURNAL OF SEMICONDUCTORS, 2016, 37 (02)
  • [8] A carrier-mobility model for high-k gate-dielectric Ge MOSFETs with metal gate electrode
    Xu, J. P.
    Xiao, X.
    Lai, P. T.
    MICROELECTRONICS RELIABILITY, 2010, 50 (08) : 1081 - 1086
  • [9] A threshold-voltage model for small-scaled GaAs nMOSFET with stacked high-k gate dielectric
    刘超文
    徐静平
    刘璐
    卢汉汉
    黄苑
    Journal of Semiconductors, 2016, 37 (02) : 75 - 80
  • [10] Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs
    Kumar, MJ
    Gupta, SK
    Venkataraman, V
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2006, 53 (04) : 706 - 711
12345