共 50 条
- [31] Signal Integrity Design and Analysis of Universal Chiplet Interconnect Express (UCIe) Channel in Silicon Interposer for Advanced Package IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS, EDAPS 2023, 2023,
- [32] Signal and Power Integrity Analysis of the SIAD Power/Ground Layer 2011 7TH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING (WICOM), 2011,
- [33] Power Integrity Co-analysis and Design in a PCB with BGA Package Using Transmission Matrix Method 2015 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM, 2015, : 78 - 80
- [34] Novel Integrated Package-on-Package for Wafer Level and Panel Level Production 2020 21ST INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2020,
- [35] Analysis of System Level Signal Integrity for High Speed Interface Design Based on GTY Transceivers 2020 INTERNATIONAL CONFERENCE ON MICROWAVE AND MILLIMETER WAVE TECHNOLOGY (ICMMT 2020 ONLINE), 2020,
- [36] Signal Integrity Analysis of a High-Performance Processor Package with Silicon Interposer 2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2014, : 833 - 837
- [37] Warpage Simulation and Analysis for Panel Level Fan-out Package PROCEEDINGS OF THE NINETEENTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM 2020), 2020, : 1160 - 1164
- [38] Power Supply Analysis in Package and SiP Design 2009 INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY & HIGH DENSITY PACKAGING (ICEPT-HDP 2009), 2009, : 99 - 102
- [39] Probe Card Design with Signal and Power Integrity for Wafer-level Application Processor Test in LPDDR Channel 2016 IEEE 66TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2016, : 2442 - 2448
- [40] Novel RDL Design of Wafer-Level Packaging for Signal/Power Integrity in LPDDR4 Application IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2018, 8 (08): : 1431 - 1439