Low-power CMOS programmable gain amplifier with a DC-offset cancellation for a direct conversion receiver

被引：0

作者：

Kim, Cheol-Hwan ^{[1
]}

Seong, Myeong-U. ^{[1
]}

Choi, Seung-Kyu ^{[1
]}

Ryu, Jee-Youl ^{[1
]}

机构：

[1] Dept. of Information and Communications Engineering, Pukyong National University, Busan, Korea, Republic of

来源：

International Journal of Control and Automation | 2015年 / 8卷 / 01期

关键词：

Radio receivers - Programmable logic controllers;

D O I：

10.14257/ijca.2015.8.1.33

中图分类号：

学科分类号：

摘要：

This paper presents low-power Programmable Gain Amplifier (PGA) with a DC-offset cancellation for a direct conversion receiver (DCR) to reduce chip area, cost and power. In the receiver stage, the direct conversion architecture has simplified scheme as compared to the conventional super-heterodyne architecture because IF stage could be omitted in the direct conversion architecture, and the system can be a single chip. The PGA controls 8-level gains from 4dB to 60dB using the CMOS switches and passive resistors in parallel, and DC-offset circuit is based on a Miller effect technique. It is fabricated using Magnachip/SK Hynix 0.18-μm CMOS 1poly-6metal process. The proposed system showed excellent gain error of less than 0.24dB, very small die area of 0.015mm2and low power consumption of 1.137mW. © 2015 SERSC.

引用

页码：351 / 360