Radiation Effects of On-Chip Transmission Lines on Devices Lying in a Same Chip

被引:0
|
作者
Bai, Yuxin [1 ]
Wang, Yiying [1 ]
Yu, Xinhua [1 ]
机构
[1] Guilin University of Electronic Technology, Guangxi Key Laboratory of Wireless Broadband and Signal Processing, Guilin,541000, China
关键词
Engineering Village;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [31] Characterization of CMOS On-Chip Transmission Lines towards Sub-THz regime
    Feng, Zijun
    Li, Nan
    Li, Xiuping
    2015 IEEE MTT-S INTERNATIONAL CONFERENCE ON NUMERICAL ELECTROMAGNETIC AND MULTIPHYSICS MODELING AND OPTIMIZATION (NEMO), 2015,
  • [32] On-chip sub-terahertz surface plasmon polariton transmission lines in CMOS
    Yuan Liang
    Hao Yu
    Hao Chi Zhang
    Chang Yang
    Tie Jun Cui
    Scientific Reports, 5
  • [33] On-chip sub-terahertz surface plasmon polariton transmission lines in CMOS
    Liang, Yuan
    Yu, Hao
    Zhang, Hao Chi
    Yang, Chang
    Cui, Tie Jun
    SCIENTIFIC REPORTS, 2015, 5
  • [34] Optimal termination of on-chip transmission-lines for high-speed signaling
    Tsuchiya, Akira
    Hashimoto, Masanori
    Onodera, Hidetoshi
    IEICE TRANSACTIONS ON ELECTRONICS, 2007, E90C (06): : 1267 - 1273
  • [35] On-chip Integrated Cherenkov Radiation Emitter
    Liu, Fang
    Xiao, Long
    Ye, Yu
    Wang, Mengxuan
    Cui, Kaiyu
    Feng, Xue
    Zhang, Wei
    Huang, Yidong
    2017 CONFERENCE ON LASERS AND ELECTRO-OPTICS (CLEO), 2017,
  • [36] Managing on-chip inductive effects
    Massoud, Y
    Majors, S
    Kawa, J
    Bustami, T
    MacMillen, D
    White, J
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2002, 10 (06) : 789 - 798
  • [37] POWER AND LOGIC DEVICES ARE MERGING ON THE SAME CHIP
    PARKER, R
    COMPUTER DESIGN, 1984, 23 (09): : 29 - &
  • [38] On-chip interconnections: Impact of adjacent lines on timing
    Deschacht, D
    Servel, G
    PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001, 2001, : 539 - 544
  • [39] Performance of On-Chip Autocorrelator with Digital Delay Lines
    Cong, Guangwei
    Okano, Makoto
    Maegami, Yuriko
    Kou, Rai
    Ohno, Morifumi
    Yamada, Koji
    2019 24TH OPTOELECTRONICS AND COMMUNICATIONS CONFERENCE (OECC) AND 2019 INTERNATIONAL CONFERENCE ON PHOTONICS IN SWITCHING AND COMPUTING (PSC), 2019,
  • [40] On-chip interconnect lines with patterned ground shields
    Lowther, R
    Lee, SG
    IEEE MICROWAVE AND GUIDED WAVE LETTERS, 2000, 10 (02): : 49 - 51