Optimization on IR-Drop Induced Accuracy Loss for Memristor-Based Neural Network

被引：0
|
作者：
Wang C. [1 ]
Zha X. [1 ]
Xia Y. [1 ]
机构：
[1] Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo
来源：
Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao/Journal of Computer-Aided Design and Computer Graphics | 2023年 / 35卷 / 04期
关键词：
IR-drop; memristor; memristor cross array; neural network;
D O I：
10.3724/SP.J.1089.2023.19384
中图分类号：
学科分类号：
摘要：
The analog properties of memristor cross array (MCA) can efficiently realize multiplication and accumulation (MAC) operation. Hence, MCA is widely used to construct the hardware accelerator of neuromorphic computing system. However, due to the nanowire resistance, the resistive network composed of the memristor and the nanowire suffers from IR-drop, which causes unavoidable loss in the output and hence affects the accuracy of neural network. In this paper, the relationships between the IR-drop of the memristor and its state, position, output current and output position are analyzed. Then, IR-drop is optimized by sparse mapping and output compensation is employed to further improve output accuracy. Experiments show that the optimization strategies proposed can effectively solve the IR-drop induced problem, and the recognition accuracy of the memristor-based neural network on MNIST dataset reaches 95.8%, with 33.5% improvement compared to the pre-optimization. © 2023 Institute of Computing Technology. All rights reserved.
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页码：633 / 639
页数：6
相关论文
共 22 条
  • [1] Mead C., Neuromorphic electronic systems, Proceedings of the IEEE, 78, 10, pp. 1629-1636, (1990)
  • [2] Xia L X, Tang T Q, Huangfu W Q, Et al., Switched by input: power efficient structure for RRAM-based convolutional neural network, Proceedings of the 53rd Annual Design Automation Conference, pp. 1-6, (2016)
  • [3] Chi P, Li S C, Xu C, Et al., PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory, Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, pp. 27-39, (2016)
  • [4] Xia L X, Ling M Y, Ning X F, Et al., Fault-tolerant training enabled by on-line fault detection for RRAM-based neural computing systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38, 9, pp. 1611-1624, (2019)
  • [5] Liang J L, Wong H S P., Cross-point memory array without cell selectors—device characteristics and data storage pattern dependencies, IEEE Transactions on Electron Devices, 57, 10, pp. 2531-2538, (2010)
  • [6] Yu S M, Chen P Y, Cao Y, Et al., Scaling-up resistive synaptic arrays for neuro-inspired architecture: challenges and prospect, Proceedings of IEEE International Electron Devices Meeting, pp. 451-454, (2015)
  • [7] Zhu Y J, Zhao X, Qiu K N, Et al., Insights and optimizations on IR-drop induced sneak-path for RRAM crossbar-based convolutions, Proceedings of the 25th Asia and South Pacific Design Automation Conference, pp. 506-511, (2020)
  • [8] Liao Y, Gao B, Yao P, Et al., Diagonal matrix regression layer: training neural networks on resistive crossbars with interconnect resistance effect, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 40, 8, pp. 1662-1671, (2021)
  • [9] Liu B Y, Li H, Chen Y R, Et al., Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, pp. 63-70, (2014)
  • [10] Brambilla A, Premoli A, Storti-Gajani G., Recasting modified nodal analysis to improve reliability in numerical circuit Simulation, IEEE Transactions on Circuits and Systems I: Regular Papers, 52, 3, pp. 522-534, (2005)
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