VLSI implementation of QC-LDPC decoder using optimized TDMP algorithm

被引：0
|
作者：
Bao, Dan [1 ]
Xiang, Bo [1 ]
Shen, Rui [1 ]
Chen, Yun [1 ]
Zeng, Xiaoyang [1 ]
机构：
[1] State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
来源：
Jisuanji Yanjiu yu Fazhan/Computer Research and Development | 2009年 / 46卷 / 02期
关键词：
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：338 / 344
相关论文
共 50 条
  • [41] A QC-LDPC code based digital signature algorithm
    Ren, Fang
    Yang, Xuefei
    Zheng, Dong
    2018 INTERNATIONAL CONFERENCE ON NETWORKING AND NETWORK APPLICATIONS (NANA), 2018, : 257 - 262
  • [42] CIRCULANT SEARCH ALGORITHM FOR THE CONSTRUCTION OF QC-LDPC CODES
    Tao, Xiongfei
    Zhou, Xiaofeng
    Feng, Deyu
    Zheng, Lixin
    2011 4TH IEEE INTERNATIONAL CONFERENCE ON BROADBAND NETWORK AND MULTIMEDIA TECHNOLOGY (4TH IEEE IC-BNMT2011), 2011, : 188 - 191
  • [43] A QC-LDPC Code Based Digital Signature Algorithm
    Ren, Fang
    Yang, Xue-Fei
    Zheng, Dong
    JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, 2019, 35 (05) : 1061 - 1074
  • [44] Construction of QC-LDPC Codes Based On PSO Algorithm
    Yang, Yang
    Xiao, Yang
    2011 IET 4TH INTERNATIONAL CONFERENCE ON WIRELESS, MOBILE & MULTIMEDIA NETWORKS (ICWMMN 2011), 2011, : 118 - 122
  • [45] A Novel FPGA Implementation of Mirror-Paradigm RS-Based QC-LDPC Decoder for NVM Channels
    Heng, Melvin
    Lim, Li
    Goh, Wang Ling
    Qin, Zhiliang
    IEEE INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATIONS SYSTEMS (ISPACS 2012), 2012,
  • [46] Design of a Multimode QC-LDPC Decoder Based on Shift-Routing Network
    Liu, Chih-Hao
    Lin, Chien-Ching
    Yen, Shau-Wei
    Chen, Chih-Lung
    Chang, Hsie-Chia
    Lee, Chen-Yi
    Hsu, Yar-Sun
    Jou, Shyh-Jye
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2009, 56 (09) : 734 - 738
  • [47] High-Throughput FPGA-based QC-LDPC Decoder Architecture
    Mhaske, Swapnil
    Kee, Hojin
    Ly, Tai
    Aziz, Ahsan
    Spasojevic, Predrag
    2015 IEEE 82ND VEHICULAR TECHNOLOGY CONFERENCE (VTC FALL), 2015,
  • [48] Automatic Implementation of Low-Complexity QC-LDPC Encoders
    Tzimpragos, Georgios
    Kachris, Christoforos
    Soudris, Dimitrios
    Tomkos, Ioannis
    2013 23RD INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS), 2013, : 243 - 246
  • [49] Matrix Reordering Techniques for Memory Conflict Reduction for Pipelined QC-LDPC Decoder
    Wu, Zhenzhi
    Liu, Dake
    Zhang, Yanjun
    2014 IEEE/CIC INTERNATIONAL CONFERENCE ON COMMUNICATIONS IN CHINA (ICCC), 2014, : 354 - 359
  • [50] High-Performance QC-LDPC Layered Decoder Based on Shortcut Updating
    Wang, Zhongyong
    Xie, Zhaoyan
    Gong, Kexian
    Yan, Jin
    Chen, Lianghui
    IEEE SIGNAL PROCESSING LETTERS, 2024, 31 : 596 - 600
12345