Search-in-Memory: Reliable, Versatile, and Efficient Data Matching in SSD's NAND Flash Memory Chip for Data Indexing Acceleration

被引:0
|
作者
Chen, Yun-Chih [1 ]
Chang, Yuan-Hao [2 ]
Kuo, Tei-Wei [3 ,4 ]
机构
[1] Tech Univ Dortmund, Fak Informat, Dept Comp Sci, D-44227 Dortmund, Germany
[2] Acad Sinica, Inst Informat Sci, Taipei 115, Taiwan
[3] Natl Taiwan Univ, High Performance & Sci Comp Ctr, Dept Comp Sci & Informat Engn, Delta Elect, Taipei 10617, Taiwan
[4] Natl Taiwan Univ, Ctr Data Intelligence Technol Applicat & Syst, Taipei 10617, Taiwan
关键词
Filtering; Energy conservation; Random access memory; Tail; Data structures; Central Processing Unit; System-on-chip; Flash memories; Testing; Indexing; Database systems; databases; flash memories; indexes systems; memory; systems;
D O I
10.1109/TCAD.2024.3443702
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
To index the increasing volume of data, modern data indexes are typically stored on solid-state drives and cached in DRAM. However, searching such an index has resulted in significant I/O traffic due to limited access locality and inefficient cache utilization. At the heart of index searching is the operation of filtering through vast data spans to isolate a small, relevant subset, which involves basic equality tests rather than the complex arithmetic provided by modern CPUs. This article demonstrates the feasibility of performing data filtering directly within a NAND flash memory chip, transmitting only relevant search results rather than complete pages. Instead of adding complex circuits, we propose repurposing existing circuitry for efficient and accurate bitwise parallel matching. We demonstrate how different data structures can use our flexible SIMD command interface to offload index searches. This strategy not only frees up the CPU for more computationally demanding tasks, but it also optimizes DRAM usage for write buffering, significantly lowering energy consumption associated with I/O transmission between the CPU and DRAM. Extensive testing across a wide range of workloads reveals up to a 9x speedup in write-heavy workloads and up to 45% energy savings due to reduced read and write I/O. Furthermore, we achieve significant reductions in median and tail read latencies of up to 89% and 85%, respectively.
引用
收藏
页码:3864 / 3875
页数:12
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