FPGA-Based High-Throughput CNN Hardware Accelerator With High Computing Resource Utilization Ratio

被引：0

作者：

Huang, Wenjin ^{[1
]}

Wu, Huangtao ^{[1
]}

Chen, Qingkun ^{[1
]}

Luo, Conghui ^{[1
]}

Zeng, Shihao ^{[1
]}

Li, Tianrui ^{[1
]}

Huang, Yihua ^{[1
,2
]}

机构：

[1] Sun Yat-sen University, School of Electronics and Information Technology, Guangzhou,510006, China

[2] Southern Marine Science and Engineering Guangdong Laboratory, Zhuhai,519080, China

来源：

IEEE Transactions on Neural Networks and Learning Systems | 2022年 / 33卷 / 08期

关键词：

Accelerator architectures - Actual throughputs - Architecture-based - Computing methods - Computing resource - Hardware accelerators - Mapping mechanism - Streaming strategies;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

引用

页码：4069 / 4083