A new design methodology of low power asynchronous comparator

被引：0

作者：

Jiang, Xiao-Bo ^{[1
]}

Ye, De-Sheng ^{[1
]}

机构：

[1] School of Electronic and Information Engineering, South China University of Technology, Guangzhou

来源：

Tien Tzu Hsueh Pao/Acta Electronica Sinica | 2012年 / 40卷 / 08期

关键词：

Comparator; LDPC (low density parity check) decoder; Low-power; Statistical characteristics of input data;

D O I：

10.3969/j.issn.0372-2112.2012.08.024

中图分类号：

学科分类号：

摘要：

Two types of low-power asynchronous comparators named asynchronous ripple comparator and pre-stop asynchronous comparator are proposed based on the statistical characteristic of input data in the paper. The asynchronous ripple comparator stops computing at the first unequal bit, but it has to deliver the result to the LSB. The pre-stop asynchronous comparator is proposed by revising the truth table based on the new 2-bit comparison unit and stop judgment circuit. It can stop comparing at the first unequal bit and obtain the result immediately. The proposed and contrastive comparators (BCL comparator and clock-gating comparator) are implemented with SMIC 0.18μm process. Simulation results show that the proposed pre-stop asynchronous comparator features the lowest power. It saves 87.1%, 84.5% and 37.5%, 28.6% power respectively Compared to the synchronous BCL comparator and clock-gating comparator with random data and data from LDPC decoder.

引用

页码：1650 / 1654

页数：4

共 14 条

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