Heterogeneous Integration Technologies for Artificial Intelligence Applications

被引:1
|
作者
Manley, Madison [1 ]
Victor, Ashita [1 ]
Park, Hyunggyu [1 ]
Kaul, Ankit [1 ]
Kathaperumal, Mohanalingam [1 ]
Bakir, Muhannad S. [1 ]
机构
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
来源
IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS | 2024年 / 10卷
关键词
Three-dimensional displays; Artificial intelligence; Chiplets; Computer architecture; Integrated circuit interconnections; Bandwidth; Multichip modules; Silicon; Glass; Through-silicon vias; Artificial intelligence (AI); glass packaging; heterogeneous integration (HI); packaging; INTERCONNECT; PACKAGE;
D O I
10.1109/JXCDC.2024.3484958
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. This has led to a technological shift toward system-level scaling approaches, such as heterogeneous integration (HI). HI is becoming increasingly implemented in many AI accelerator products due to its potential to enhance overall system performance while also reducing electrical interconnect delays and energy consumption, which are critical for supporting data-intensive AI workloads. In this review, we introduce current and emerging HI technologies and their potential for high-performance systems. We then survey recent industrial and research progress in 3-D HI technologies that enable high bandwidth systems and finally present the emergence of glass core packaging for high-performance AI chip packages.
引用
收藏
页码:89 / 97
页数:9
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