A performance comparison of hysteresis current control techniques for D-STATCOM application

For any grid connected system such as D-STATCOM, the conventional hysteresis current controller (HCC) for a two-level voltage source inverter (VSI) is a popular choice. It uses fixed bands in each of the three phases to contain the current errors. Although HCC is simple to implement, it has few drawbacks i.e, poor-employment of zero vectors and random switching among the available switching vectors, which may lock into limit cycles and increased switching losses of the inverter. Out of many other hysteresis techniques, a space vector modulation based technique named as SVM-HCC effectively selects a reduced set of vectors for hysteresis current control in every sector of space vector plane but its switching sequence is not optimal. Alternatively, following a different approach, the space vector hysteresis current controller (SVHCC) manifests systematic pattern in the vector switching where the sequence of inverter voltage vectors is similar to that of a voltage controlled space vector pulse width modulation (VC-SVPWM) scheme. This better way of switching in SVHCC tends to reduce the distortion of the VSI output current, which also appears as reduced ripples in the current. A comparative study on quantifying these differences among HCC, SVM-HCC and SVHCC is first time executed in this work and they are further validated using the results of simulation studies and hardware experimental investigations.