HLQ: Hardware-Friendly Logarithmic Quantization Aware Training for Power-Efficient Low-Precision CNN Models

被引:0
作者
Choi, Dahun [1 ]
Park, Juntae [1 ]
Kim, Hyun [1 ]
机构
[1] Seoul Natl Univ Sci & Technol, Res Ctr Elect & Informat Technol, Dept Elect & Informat Engn, Seoul 01811, South Korea
来源
IEEE ACCESS | 2024年 / 12卷
关键词
Quantization (signal); Accuracy; Training; Propagation losses; Convolutional neural networks; Computational modeling; Power demand; Integrated circuit modeling; Hardware; Indexes; Low power electronics; Compression algorithms; Logarithmic quantization; convolutional neural network; low-power; network compression;
D O I
10.1109/ACCESS.2024.3488093
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
With the development of deep learning and graphics processing units (GPUs), various convolutional neural network (CNN)-based computer vision studies have been conducted. Because numerous computations are involved in the inference and training process of CNNs, research on network compression, including quantization, is being actively conducted along with the use of CNNs. Unlike the existing linear quantization, logarithmic quantization has the advantage that the multiply-accumulate (MAC) operation in the convolution (CONV) operation, which occupies most of the CNNs, can be replaced with the addition operation and is suitable for low-precision quantization. In this paper, we propose a logarithmic quantization aware training technique that effectively reduces quantization loss while maximizing the effect of reducing hardware resources and power consumption in the forward and backward propagation processes of the CNN. The proposed method minimizes the accuracy drop by allocating the rounding point with the least quantization loss for each specific training in the forward pass and propagates the optimized gradient by scaling the gradient of parameters with a high quantization loss in the backward pass. As a result of scratch training on the Tiny-ImageNet dataset using ResNet-18, 34, and 50, where both weights and activations are quantized to 4-bits through the proposed method, an improvement in accuracy of 0.88%, 0.48%, and 1.72%, respectively, can be achieved compared to that of the baseline (i.e., full-precision). In addition, as a result of synthesizing the CONV acceleration unit of ResNet-18 through RTL implementation, the proposed 4-bit quantization can achieve a power saving of 82.3% compared to the baseline (i.e., full-precision) when computing ResNet-18.
引用
收藏
页码:159611 / 159621
页数:11
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