Design of Small-area and Low-power Expanded-PWM Using Adiabatic Dynamic CMOS Logic for 12-step Dimming Control Circuit

被引：0

作者：

Yoshida K. ^{[1
]}

Cho S.-I. ^{[1
]}

Yokoyama M. ^{[1
]}

机构：

[1] Graduate School of Science and Engineering, Yamagata University, 4-3-16, Jonan, Yonezawa, Yamagata

来源：

IEEJ Transactions on Electronics, Information and Systems | 2021年 / 141卷 / 12期

关键词：

adiabatic logic; D-FF circuits; low-power design; multi-step dimming; multiplexer; PWM circuits;

D O I：

10.1541/ieejeiss.141.1286

中图分类号：

学科分类号：

摘要：

In this paper, we propose design of low-power digital expanded-pulse width modulation (E-PWM) using adiabatic dynamic CMOS logic (ADCL) for 12-step dimming control circuit of an LED lighting system. As results of HSPICE simulation, power consumption of E-PWM was reduced by approximately 90% compared to conventional CMOS 12-step dimming PWM circuits. Furthermore, the layout of E-PWM was designed using 0.18μm standard CMOS process and circuit area of 12-step dimming PWM circuit was compared between previous studies and this study. The area of the design layout is not only significantly reduced compared to the dimming PWM of previous studies using ADCL, but also reduced approximately 68% compared to the conventional CMOS 12-step dimming PWM circuit. © 2021 The Institute of Electrical Engineers of Japan.

引用

页码：1286 / 1295

页数：9