Thermal Analysis and Optimization of Vertical-cavity Surface-emitting Lasers with Different Packaging Structures

被引:0
作者
Zhang, Wei [1 ,2 ]
Wang, Yanjing [1 ]
Tong, Haixia [3 ]
Wang, Ziye [1 ,2 ]
Lu, Huanyu [1 ]
Wang, Pinyao [1 ,2 ]
Tong, Cunzhu [1 ,3 ]
机构
[1] State Key Laboratory of Luminescence Science and Applications, Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Sciences, Changchun
[2] University of Chinese Academy of Sciences, Beijing
[3] Jlight Semiconductor Technology Co.,Ltd., Changchun
来源
Faguang Xuebao/Chinese Journal of Luminescence | 2024年 / 45卷 / 08期
基金
中国国家自然科学基金;
关键词
temperature; thermal characteristics; thermal resis⁃ tance; vertical-cavity surface-emitting laser(VCSEL);
D O I
10.37188/CJL.20240141
中图分类号
学科分类号
摘要
Vertical-cavity surface-emitting laser(VCSEL)is easily integrated on-chip and is a key optoelectronic device in systems such as laser radar and security lighting. However,the severe self-heating phenomenon can affect the output power,high-speed characteristics,and stability of the devices. Therefore,thermal management technolo⁃ gy is extremely important,and adopting an optimized packaging approach can effectively increase the heat dissipa⁃ tion of VCSELs,which is an important method to improve VCSELs’thermal performance. This article is based on a finite element method(FEM)computational model to numerically analyze the thermal characteristics of VCSELs with different packaging methods and a thin copper layer covering the devices’surface. The simulation results indicate that compared to the top-emitting packaging method,the flip-chip packaging with substrate-emitting(fully etched top and bottom DBR)can effectively reduce the active region temperature,with a reduction rate exceeding 56%. As the device mesa diameter gradually increases,devices using the top-emitting packaging method show a decreasing trend in temperature and thermal resistance,with a temperature reduction 50 ℃ and the thermal resistance reduction of over 3. 25 K/mW. However,devices with a fully etched top and bottom DBR structure using flip-chip packaging and devices with only etched P-DBR structure using flip-chip packaging both exhibit a slowly increasing trend in tempera⁃ ture and thermal resistance,with temperature increases of 2 ℃ and thermal resistance increases of 0. 15 K/mW. Cov⁃ ering the device mesa,sidewalls,and substrate surfaces with a layer of copper can effectively reduce the temperature of the active region. When the thickness of the copper layer is 3 µm,the temperature reduction of the active region is 43% and thermal resisitance reduction is 1. 9 K/mW. This article analyzes the impact of packaging methods on the thermal characteristics of VCSELs and proposes optimization solutions,which have guiding significance for the effec⁃ tive thermal packaging of VCSELs. © 2024 Editorial Office of Chinese Optics. All rights reserved.
引用
收藏
页码:1371 / 1379
页数:8
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