Objective The silicon oxide/polycrystalline silicon (POLO junction) is the crucial component of TOPCon solar cells, comprising a crystalline silicon substrate covered with an ultra- thin layer of silicon oxide and a heavily doped polycrystalline silicon layer. During the high- temperature sintering process required in TOPCon solar cell manufacturing, the ultra- thin silicon oxide layer can easily develop pinholes due to stress induced by high temperature. For silicon oxide layers exceeding 2 nm, pinhole transport is generally considered the dominant carrier transport mechanism. However, high temperatures during annealing not only induce pinhole formation but also create high- concentration defects in the silicon oxide layer. These defects may assist in charge carrier tunneling, becoming a significant, non- negligible mode of carrier transport. Previous experimental studies on POLO junction have shown that stress- induced defects increase leakage current. In addition, stress- induced defects have been observed to cause additional current in metal- oxide- semiconductor (MOS) devices with oxide layer thicknesses greater than 2 nm. These observations suggest that trap- assisted tunneling (TAT) may also be a major carrier transport mechanism in TOPCon solar cells, potentially dominating devices with oxide layer thicknesses exceeding 2 nm and high defect concentrations. However, the theoretical and experimental study of the TAT transport mechanism in TOPCon solar cells is currently lacking. Therefore, we aim to theoretically explore the influence of TAT transport on carrier transport in TOPCon solar cells, which is crucial for a deeper understanding of TOPCon solar cell carrier transport mechanisms. The contact resistance of the POLO junction is an important parameter for assessing TOPCon solar cell performance. Therefore, we primarily investigate the influence of TAT transport on the current voltage (I- V ) characteristics and corresponding contact resistivity of POLO junctions under dark conditions.<br /> Methods We consider two primary transport mechanisms, direct tunneling (DT) and TAT, and employ numerical simulation to theoretically calculate the carrier transport characteristics of the POLO junction. The drift- diffusion model utilized to compute the I- V characteristics and corresponding contact resistivity. The model includes the Poisson equation and continuity equation, where the Poisson equation determines the potential distribution and the continuity equation describes the carrier concentration distribution under electric field influence, concentration gradient, etc. Due to heavy doping in the polycrystalline silicon region, we assume zero minority carrier lifetime and equal quasi- Fermi energy levels for electrons and holes in the polycrystalline silicon region under steady-state conditions. Therefore, for numerical computation of I- V characteristics and corresponding contact resistivity, discretization of the substrate silicon region using the finite difference method and self- consistent solution of the Poisson equation and continuity equation are sufficient. For simplification, the interface state charge relative to the space charge can be neglected in the considered POLO junction. addition, we also calculate the relationship between parameters such as silicon oxide thickness, impurity concentration distribution diffusing from polycrystalline silicon into substrate silicon, and contact resistance of the POLO junction. compares these findings with the DT transport mechanism to deeply analyze the significant role of the TAT transport mechanism in the carrier transport process.<br /> Results and Discussions To validate the proposed theoretical model, a quantitative comparison is initially made between simulated I- V characteristics and reported experiments. When considering both DT and TAT transport mechanisms simultaneously, the calculated I- V characteristic curve quantitatively aligns with experimental data, and the corresponding extracted contact resistivity also matches experimental results (Fig. 2). The sum of currents calculated by considering only DT and TAT as individual transport mechanisms significantly exceeds currents calculated when both are considered primary transport mechanisms simultaneously (Fig. 2). This suggests interdependence between DT and TAT processes rather than independent operation. DT transport predominates when the oxide layer thickness is less than 1 nm (Fig. 3). As thickness increases, DT transport diminishes while TAT transport becomes increasingly significant, playing a major role (Fig. 3). At an oxide layer thickness of 1.8 nm, DT transport effects become negligible, and TAT transport dominates (Fig. 3). When the oxide layer thickness reaches 1.2 nm, contact resistivity calculated by considering only DT and TAT primary transport mechanisms initially increases and then decreases. Moreover, TAT transport contributes more significantly than DT transport when the peak impurity concentration is less than 3><1020 cm-3 . When the peak impurity concentration exceeds 3><1020 cm-3 , DT transmission prevails over TAT transmission (Fig. 6). At an oxide layer thickness of 1.8 nm, TAT transport dominates, causing contact resistivity to initially rise and then decline (Fig. 6). Conclusions Single- parameter fitting of TAT yields a calculated I- V curve consistent with existing experimental data, indicating that TAT transport may be a primary carrier transport mechanism in POLO junctions or TOPCon solar cells. Notably, the sum of currents calculated by considering only DT and TAT as individual mechanisms does not match that calculated when both are considered simultaneously. This suggests mutual influence between DT and TAT processes. Furthermore, comparison and analysis of DT and TAT transport mechanism contributions to carrier transport at different oxide layer thicknesses reveal comparable effects at 1.2 nm, with TAT becoming dominant at thicknesses exceeding 1.8 nm. Lastly, we explore the relationship between contact resistivity and impurity distribution diffusing from polycrystalline silicon into substrate silicon, finding that contact resistivity varies slightly monotonically with the diffusion length parameter. At oxide layer thicknesses above 1.2 nm, contact resistivity does not monotonically vary with peak impurity concentration, achieving minimum resistivity when peak impurity concentration matches the doping concentration of polycrystalline silicon.
