High energy-efficient capacitor array DAC for SAR ADC

被引：0
作者：
Hu, Yun-Feng [1 ,2 ]
Li, Bin [1 ]
Wu, Zhao-Hui [1 ]
机构：
[1] School of Electronic and Information Engineering, South China University of Technology, Guangzhou, 510640, Guangdong
[2] Zhongshan Institute, University of Electronic Science and Technology of China, Zhongshan, 528402, Guangdong
来源：
Huanan Ligong Daxue Xuebao/Journal of South China University of Technology (Natural Science) | 2015年 / 43卷 / 09期
基金：
中国国家自然科学基金;
关键词：
Analog to digital conversion; Capacitor array DAC; High energy-efficiency; Successive approximation register;
D O I：
10.3969/j.issn.1000-565X.2015.09.008
中图分类号：
学科分类号：
摘要：
Capacitor array digital-to-analogue converter (DAC) is one of the main energy consumption sources of successive approximation register analogue-to-digital converter (SAR ADC). In order to reduce the energy consumption of capacitor array DAC, this paper proposes a high energy-efficient capacitor array DAC structure. In the structure, each capacitor part is connected in turn through a switch. In the first two comparison cycles, owing to the top-plate sampling technique and the level shift technique, there is no switching energy consumption in the capacitor array DAC; in the rest of comparison cycles from the third to the nth, owing to the charge sharing technique and the voltage monotonic down technique, there exists a low switching energy consumption in the capacitor array DAC. Simulation results show that, in comparison with the traditional capacitor array DAC structure, the proposed structure can decrease the energy consumption by 99.22% and reduce the number of capacitors by 75%. ©, 2015, South China University of Technology. All right reserved.
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页码：47 / 53and66
页数：5319
相关论文
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