Universal low-jitter level shifter drives high-performance ADCs

被引：0
|
作者：
LeBoeuf, Robert [1 ]
机构：
[1] National Semiconductor Corp., East Coast Labs Div., 1 Stiles Rd., Salem, NH 03079, United States
来源：
| 2002年 / Penton Publishing Co.卷 / 50期
关键词：
Clocks; -; Jitter;
D O I：
暂无
中图分类号：
TH7 [仪器、仪表];
学科分类号：
0804 ; 080401 ; 081102 ;
摘要：
A circuit that converted a low-phase-noise sinusoidal signal into a low-jitter square wave, suitable for driving analog to digital converters (ADC) was designed. The circuit was an excellent source for generating low-jitter clocks. It was also applicable for designing system which required clocks to be level-shifted, reshaped or converted from single ended to differential with a minimum of added jitter.
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