Embedded storage mechanism based on NAND Flash for mass data

被引：0
|
作者：
Zhang H. [1 ]
Zhou Y. [1 ]
Wang C. [1 ]
机构：
[1] College of Computer Science and Technology, Huaqiao University, Xiamen, 361021, Fujian
来源：
Huazhong Keji Daxue Xuebao (Ziran Kexue Ban)/Journal of Huazhong University of Science and Technology (Natural Science Edition) | 2017年 / 45卷 / 01期
关键词：
Embedded systems; Mass data; Pipelining; Storage mechanism; Switch matrix;
D O I：
10.13245/j.hust.170109
中图分类号：
学科分类号：
摘要：
In order to effectively solve the high-speed storage problem of mass data with solid state devices, an embedded storage mechanism using NAND Flash was proposed, which integrated a loop SRAM buffer array, a multibank Flash array and a crossbar-based switch matrix. The SRAM array was divided into groups for reading or writing operations and used loop management. The Flash array employed parallel dual bus, cross addressing and multi-stage pipeline. The two arrays were connected by the switch matrix, which could improve the access bandwidth and the scalability of the mechanism. Theoretical analysis and simulation results show that the max speed-up of data access can be achieve about 20 and the storage mechanism can be effectively applied to the embedded storage for mass data. © 2017, Editorial Board of Journal of Huazhong University of Science and Technology. All right reserved.
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页码：46 / 51
页数：5
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