A framework for design space exploration and performance analysis of networked embedded systems

被引：0

作者：

Dep. of Computer Science, University of Cantabria, Spain ^{[1
]}

不详 ^{[2
]}

机构：

[1] Dep. of Computer Science, University of Cantabria

[2] Dep. of Computer Science, University of Verona

来源：

ACM Int. Conf. Proc. Ser. |

关键词：

Design Space Exploration; MARTE; Networked Embedded Systems; Performance Analysis; Simulation; SystemC; UML;

D O I：

10.1145/2555486.2555488

中图分类号：

学科分类号：

摘要：

The design of the network in distributed embedded systems often necessitates the analysis of its HW/SW tradeoffs along with network tradeoffs. To do so, a framework is presented to perform joint exploration of both HW/SW and network (NW) design spaces. In the proposed approach, UML+Profiles are used to model the whole system and SystemC code generation mechanism is exploited to validate it. SystemC-based HW/SW and NW simulators are integrated and used to simulate the overall system model. Design tradeoffs of HW/SW and NW are characterized to define the overall joint design space. In order to validate the proposed framework, an example of automotive application is used to explore several performance metrics and show how the framework is able to find the optimal set of design parameters.

引用

共 21 条

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