共 9 条
[1]
Blake G., Dreslinski R.G., Mudge T., A survey of multicore processors, IEEE Signal Processing Magazine, 26, 6, pp. 26-37, (2009)
[2]
Jaleel A., Theobald K.B., Steely S.C., Et al., High performance cache replacement using re-reference interval prediction, Proceedings of Computer Architecture News, 38, 3, pp. 60-71, (2010)
[3]
Fedorova A., Operating system scheduling for chip multithreaded processors, (2006)
[4]
Soares L., Tam D., Stumm M., Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer, Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture, pp. 258-269, (2008)
[5]
Subramanian R., Smaragdakis Y., Loh G.H., Adaptive caches: effective shaping of cache behavior to workloads, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 385-396, (2006)
[6]
Xiang L.X., Chen T.Z., Shi Q., Et al., Less reused filter: improving L2 cache performance via filtering less reused lines, Proceedings of the 23rd International Conference on Supercomputing, pp. 68-79, (2009)
[7]
Dybdahl H., Stenstrom P., An adaptive shared/private nuca cache partitioning scheme for chip multiprocessors, Proceedings of IEEE 13th International Symposium on High Performance Computer Architecture, pp. 2-12, (2007)
[8]
Chang J., Sohi G.S., Cooperative caching for chip multiprocessors, Proceedings of the 33nd Annual International Symposium on Computer Architecture, pp. 264-276, (2006)
[9]
Herrero E., Gonzalez J., Canal R., Distributed cooperative caching, Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, pp. 134-143, (2008)