Design of a ROM-less direct digital frequency synthesizer on FPGA

被引：0

作者：

Jiang, Zhanpeng ^{[1
]}

Xu, Rui ^{[1
]}

Huang, Hai ^{[1
]}

Dong, Changchun ^{[1
]}

机构：

[1] Department of Integrated circuits design and integrated systems, Harbin University of Science and Technology, Harbin,Heilongjiang, China

来源：

International Journal of Signal Processing, Image Processing and Pattern Recognition | 2015年 / 8卷 / 05期

关键词：

Digital storage - Frequency synthesizers - Low pass filters - Phase locked loops - Integrated circuit design - Field programmable gate arrays (FPGA);

D O I：

10.14257/ijsip.2015.8.5.33

中图分类号：

学科分类号：

摘要：

DDFS (Direct Digital Frequency Synthesizer) is a new technique of frequency synthesizes which introduces the advanced digital processing theory into frequency synthesis. A direct digital frequency synthesizer is composed of a phase accumulator, an adder, an ROM for wave pattern saving, a D/A converter and a LPF (low pass filter). With the rapid development of VLSI, the speed of algorithm is required increasingly higher. This paper proposes a new frequency synthesizer by improving the structure of data storage which ensures the accuracy and speed. Rotation method was used to resolve the expected angle into many small rotation angles and sting wave symmetry principle was used to resolve the string wave. From point to area, the values in one quadrant were calculated and sampled and then the data was saved in ROM. Under the control of frequency, the data in ROM was read and then transferred to the D/A converter chip and the following low pass filter to achieve frequency synthesize. This algorithm could reduce the usage of ROM to increase the calculation efficiency. © 2015 SERSC.

引用

页码：327 / 340