Redundant via insertion with cut optimization for self-aligned double patterning

被引：0
|
作者：
Song, Youngsoo [1 ,2 ]
Jung, Jinwook [1 ]
Shin, Youngsoo [1 ]
机构：
[1] School of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
[2] Samsung Electronics, Hwasung,18448, Korea, Republic of
来源：
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI | 2017年 / Part F127756卷
关键词：
Compilation and indexing terms; Copyright 2024 Elsevier Inc;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
1-d gridded designs - Candidate positions - Design rules - Metal layer - Optimization problems - Redundant via - Redundant via insertion - Self-aligned double patterning
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页码：137 / 142
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