Redundant via insertion with cut optimization for self-aligned double patterning
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作者:
Song, Youngsoo
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School of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
Samsung Electronics, Hwasung,18448, Korea, Republic ofSchool of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
Song, Youngsoo
[1
,2
]
Jung, Jinwook
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h-index: 0
机构:
School of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic ofSchool of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
Jung, Jinwook
[1
]
Shin, Youngsoo
论文数: 0引用数: 0
h-index: 0
机构:
School of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic ofSchool of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
Shin, Youngsoo
[1
]
机构:
[1] School of Electrical Engineering, KAIST, Daejeon,34141, Korea, Republic of
[2] Samsung Electronics, Hwasung,18448, Korea, Republic of
来源:
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
|
2017年
/
Part F127756卷
关键词:
Compilation and indexing terms;
Copyright 2024 Elsevier Inc;
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摘要:
1-d gridded designs - Candidate positions - Design rules - Metal layer - Optimization problems - Redundant via - Redundant via insertion - Self-aligned double patterning