Problems and optimizations of refresh for large-capacity DRAM

DRAM (dynamic random access memory) is widely used as main memory of computer system, which is of fast speed, high density and low cost. DRAM uses capacitors as basic storage cells, and uses the amount of charges to represent digital “0” and “1”. However, the capacitor charges leak over time, causing data lost. To maintain data integrity, DRAM periodically refreshes all cells-read data out before lost and rewrite into cells. Refresh operations block normal memory requests, causing performance overhead; refresh operations also consume extra power, causing energy overhead. The refresh overheads are related to DRAM density. In the past, DRAM density was relative small, and the amount of cells needing to be refreshed was not that large, so the overheads gain little attention. But as the evolving of Moore's Law, DRAM density grows to Gigabits today, and more cells need to be refreshed during the same period, exacerbating the performance and energy overheads. The problem of refresh has now been an important concern for both industry and academia. In this paper, we first introduce how refreshes are performed, its overheads, and some improvements from industry; then we classify the many improvements from industry and academia into two categories-reducing the blocking of memory requests, and reducing the unnecessary refreshes-and give our analysis and summaries, respectively; finally, we conclude the research work and point out the possible research directions. © 2016, Science Press. All right reserved.