Reconfigurable stream processor architecture for software radio

Software radio is hard to be implemented. This is because that existing general purpose digital signal processors (DSP) are not competent for the works with highly computing intensity and baseband processor has poor scalability and flexibility. In order to get over the disadvantages of general purpose DSP and the baseband processor, the article puts forward a novel architecture of reconfigurable stream processor along with application-specific instruction set for software radio. The simulation results of the proposed processor show that the reconfigurable structure provides instruction set extension which can process not only existing wireless communication standards but also new ones with high efficiency. The results also show that the stream oriented structure and the reconfigurable instruction set for software radio ensure processing high-speed baseband signals in real time. Compared with general purpose DSP, the processor gains improvement of computing performance from five to thirteen times. The main goal of the article is to propose an effective way of designing hardware with both high computational performance and enough adaptive ability for software radio.