共 50 条
[32]
Using complete-1-distinguishability for FSM equivalence checking
[J].
1996 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS,
1996,
:346-353
[33]
Equivalence checking of combinational circuits using Boolean expression diagrams
[J].
IEEE Trans Comput Aided Des Integr Circuits Syst,
7 (903-917)
[34]
Equivalence Checking of Reversible Circuits
[J].
ISMVL: 2009 39TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC,
2009,
:324-+
[35]
Equivalence Checking for Intelligent Circuits
[J].
2008 INTERNATIONAL SYMPOSIUM ON INTELLIGENT INFORMATION TECHNOLOGY APPLICATION WORKSHOP: IITA 2008 WORKSHOPS, PROCEEDINGS,
2008,
:785-787
[36]
Equivalence checking of integer multipliers
[J].
PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001,
2001,
:169-174
[37]
Equivalence Checking of Quantum Protocols
[J].
TOOLS AND ALGORITHMS FOR THE CONSTRUCTION AND ANALYSIS OF SYSTEMS, TACAS 2013,
2013, 7795
:478-492
[38]
A method for approximate equivalence checking
[J].
30TH IEEE INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC, PROCEEDINGS,
2000,
:447-452