An improved asymmetrical multi-level inverter topology with boosted output voltage and reduced components count

被引：0
|
作者：
Arif, M Saad Bin [1 ,4 ]
Mustafa, Uvais [1 ]
Siddique, Marif Daula [2 ]
Ahmad, Shahbaz [1 ]
Iqbal, Atif [2 ]
Ashique, Ratil Hasnat [3 ]
Ayob, Shahrin bin [4 ]
机构：
[1] Department of Electrical Engineering, Z. H. College of Engineering and Technology, AMU, Aligarh, India
[2] Department of Electrical Engineering, Qatar University, Doha, Qatar
[3] Department of Electrical Electronics Engineering, Green University Bangladesh, Dhaka, Bangladesh
[4] Power Engineering Department, School of Electrical Engineering, UTM, Johor, Malaysia
来源：
IET Power Electronics | 2022年 / 14卷 / 12期
关键词：
Balancing - Bridge circuits - Electric inverters;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：2052 / 2066
相关论文
共 50 条
  • [31] Design and Development of Asymmetrical Multi-Level Inverter for solar energy
    Kumar, Ravi, V
    Sanjay, N.
    2018 3RD INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, COMMUNICATION, COMPUTER, AND OPTIMIZATION TECHNIQUES (ICEECCOT - 2018), 2018, : 147 - 150
  • [32] Modified Multi-output Asymmetric Multi-level Inverter
    Mehulkumar, Bhabhor
    Virat, Baria
    Venkataramanaiah, J.
    IECON 2021 - 47TH ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2021,
  • [33] Low Switching Frequency Based Asymmetrical Multilevel Inverter Topology With Reduced Switch Count
    Siddique, Marif Daula
    Mekhilef, Saad
    Shah, Noraisyah Mohamed
    Sarwar, Adil
    Iqbal, Atif
    Tayyab, Mohammad
    Ansari, Mohsin Karim
    IEEE ACCESS, 2019, 7 : 86374 - 86383
  • [34] A Multilevel Inverter Topology With an Improved Reliability and a Reduced Number of Components
    Akbari, Amirhosein
    Ebrahimi, Javad
    Jafarian, Yousefreza
    Bakhshai, Alireza
    IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2022, 10 (01) : 553 - 563
  • [35] Novel Three Phase Multi-Level Inverter Topology with Symmetrical DC-Voltage Sources
    Salem, Ahmed
    Ahmed, Emad M.
    Ahmed, Mahrous
    Orabi, Mohamed
    APEC 2016 31ST ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, 2016, : 1505 - 1511
  • [36] Performance evaluation of an asymmetrical reduced switched multi-level inverter for a grid-connected PV system
    Das, Madan Kumar
    Jana, Kartick Chandra
    Sinha, Akanksha
    IET RENEWABLE POWER GENERATION, 2018, 12 (02) : 252 - 263
  • [37] Design and Implementation of 31-Level Asymmetrical Inverter With Reduced Components
    Prasad, Devalraju
    Dhanamjayulu, C.
    Padmanaban, Sanjeevikumar
    Holm-Nielsen, Jens Bo
    Blaabjerg, Frede
    Khasim, Shaik Reddi
    IEEE ACCESS, 2021, 9 : 22788 - 22803
  • [38] Design and Implementation of a High-gain Switched-capacitor Step-up Multi-level Inverter with Reduced Components Count
    Nanda, Haresh
    Sharma, Himanshu
    Yadav, Arvind
    ELECTRIC POWER COMPONENTS AND SYSTEMS, 2024,
  • [39] A multi-level inverter for driving a high voltage display
    Patangia, H. (hcpatangia@ualr.edu), Circuits and Systems Society, IEEE CASS; Science Council of Japan; The Inst. of Electronics, Inf. and Communication Engineers, IEICE; The Institute of Electrical and Electronics Engineers, Inc., IEEE (Institute of Electrical and Electronics Engineers Inc.):
  • [40] A multi-level inverter for driving a high voltage display
    Patangia, H
    Wijaya, T
    Gregory, D
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2005, : 4461 - 4464
12345